Compiling process started (2024-09-27 13:12:22), please wait...
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Compiling model for device with id 0
PWM Modulators scheduling completed.
Circuit is divided into 3 subcircuits.
Partial list of components in subcircuit (SPC) 0:
Split-phase Grid
PV CB
Coupling and Meter Circ1.Va2
Partial list of components in subcircuit (SPC) 1:
Loads - Circ1.L1 - PE Loads
Coupling and Meter Circ1.Meter L2
Loads - Circ1.L2 - PE Loads
Partial list of components in subcircuit (SPC) 2:
Loads - Circ2.L1 - PE Loads.DC.PE - DCBus1
Loads - Circ2.L1 - PE Loads
Loads - Circ2.L1 - PE Loads.DC.PE - DCBus4
Communication lines scheduling completed.
Running Device specific hw utilization analysis:
Standard processing core utilization: 3 out of 3 100.0%
Machine solver utilization: 0 out of 1 0.0%
DC-DC converter solvers utilization: 0 out of 2 0.0%
Signal generator utilization: 2 out of 12 16.67%
Look up tables utilization: 1 out of 8 12.5%
PWM modulator utilization: 0 out of 12 0.0%
PWM analyzer utilization: 0 out of 0 0.0%
Parallel DTV Conv. Detectors utilization: 0 out of 3 0.0%
Running core0 specific hardware utilization analysis:
Power Electronics Converters utilization: 0 out of 4 0.0%
Contactor utilization: 3 out of 6 50.0%
TVE solvers utilization: 0 out of 16 0.0%
SP sources utilization: 5 out of 16 31.25%
Delayed controlled sources utilization: 0 out of 12 0.0%
Non-ideal switches utilization: 2 out of 32 6.25%
Running core1 specific hardware utilization analysis:
Power Electronics Converters utilization: 2 out of 4 50.0%
Contactor utilization: 1 out of 6 16.67%
TVE solvers utilization: 2 out of 16 12.5%
SP sources utilization: 3 out of 16 18.75%
Delayed controlled sources utilization: 4 out of 12 33.33%
Non-ideal switches utilization: 2 out of 32 6.25%
Running core2 specific hardware utilization analysis:
Power Electronics Converters utilization: 2 out of 4 50.0%
Contactor utilization: 1 out of 6 16.67%
TVE solvers utilization: 4 out of 16 25.0%
SP sources utilization: 2 out of 16 12.5%
Delayed controlled sources utilization: 4 out of 12 33.33%
Non-ideal switches utilization: 4 out of 32 12.5%
Forward voltage drop unit scheduling completed.
Forward voltage drop unit scheduling completed.
Forward voltage drop unit scheduling completed.
Machine losses calculation scheduling completed.
Calculating continuous state space matrices for core0...
Calculating continuous state space matrices for core1...
Calculating continuous state space matrices for core2...
Discretization of state space matrices...
Simulation step set to 5e-06 s
Scaled discretization step set to 5e-06 s
Simulation step set to 5e-06 s
Scaled discretization step set to 5e-06 s
Simulation step set to 5e-06 s
Scaled discretization step set to 5e-06 s
Memory utilization analysis...
Matrix memory utilization of core0 is 4.72%
Matrix memory utilization of core1 is 33.85%
Matrix memory utilization of core2 is 53.65%
Timing constraint analysis...
Time slot utilization of core0 is 22.12%
Time slot utilization of core1 is 39.5%
Time slot utilization of core2 is 58.62%
Time slot utilization of other functional units is 8.5%
Timing constraints met!
Coupling stability analysis in progress...
Coupling element Coupling and Meter Circ1.Core Coupling.cpl1 inside Coupling and Meter Circ1 is stable.
Coupling element Coupling and Meter Circ1.Core Coupling.cpl2 inside Coupling and Meter Circ1 is stable.
Coupling element Coupling and Meter Circ2.Core Coupling.cpl1 inside Coupling and Meter Circ2 is stable.
Coupling element Coupling and Meter Circ2.Core Coupling.cpl2 inside Coupling and Meter Circ2 is stable.
Coupling stability analysis completed.
Losses calculation scheduling completed.
Machine dynamic model scheduling completed.
Writing device configuration files...
Electrical part of compiler successfully finished.
Starting code generation for user 0 CPU
Signal processing IO variables utilization: 46 out of 4194304
Signal processing Probes utilization: 236 out of 1024
Signal processing Digital Probes utilization: 0 out of 512
Signal processing tunable parameters utilization: 0 out of 4194304
Signal processing Streaming bandwidth: 71.68 kSPS out of 512.0 kSPS.
C code generated successfully!
Starting compilation of generated C code...
Total utilization of the external memory: 1320 out of 65536 kB (2.01%)
Code segment size: 238 out of 65536 kB (0.36%)
Data segment size: 1081 out of 65536 kB (1.65%)
C code compilation was successful!
Compiling model for device with id 0 finished successfully
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Compilation finished successfully.
Compiling process finished.